_{1}

^{*}

There are DAC structures available in the literature for radix r = 2, 3, and 4; but how they are arrived at is missing. No general structure is available for any radix r. The aim of the paper is, therefore, to fulfil these gaps. To start with, the design relations are derived for the simplest possible attenuator circuit when connected to a voltage source V and a series resistance R, such that the complete circuit offers the Thevenin resistance R. Spread relations for this attenuator are derived. An example when 3 such attenuators with different attenuation constants are connected in cascade is given. Interestingly, the two attenuators with attenuation factors 1/2 and 1/3 have the same spread of 2. A generalized attenuator is then obtained when N number of identical attenuators are connected in cascade. This is modified to derive a digital to analog converter for any radix r.

Multiple logics have several advantages over binary ones. Therefore, many multiple logic circuits have been developed [

This paper gives the design of ladder DACs for any radix r. B/A, T/A, Q/A converters are the special cases. Conditions will be derived when N number of attenuators (one such attenuator is shown in

Consider the circuit shown in

V 1 = R 2 R 2 + R 1 + R V = a V (1)

where

a = R 2 R 2 + R 1 + R (2)

is the AF. Thevenin resistance R_{T}_{1} as seen from 1-1’ in _{1} and then restoring it by connecting a parallel resistance R_{2}. Thus the condition is

R T 1 = R 2 ( R 1 + R ) R 2 + R 1 + R = R . (3)

Solving for R_{1}, we get

R 1 = ( 1 − a a ) R = ( r − 1 ) R . (4)

From (2) and (4), we get

R 2 = ( 1 1 − a ) R = ( r r − 1 ) R . (5)

After substituting the values of R_{1} and R_{2} in circuit of _{2}, we scale up all the resistance values by a factor (r − 1). Scaled circuit is shown in

Note that, if a voltage V is applied in series with rR instead of (r − 1)R, as shown in _{T}_{1}.

Out of the three resistance values (r − 1), r and (r − 1)^{2} in ^{2} as long as (r − 1)^{2} ≥ r, i.e., when r ≥ 2.6 and ≤ 0.36. For integer values of r, r ≥ 3 as r cannot be negative.

Spread

S = R max R min = { ( r − 1 ) 2 r − 1 = r − 1 , r ≥ 3 r r − 1 , r = 2 . (6)

Note that the spread is 2 for both r = 2 and 3.

If one more section is cascaded as shown in

V 2 = R 2 R 2 + R 1 + R a V = a 2 V (7)

and Thevenin resistance is still R. The Thevenin equivalent is shown in

Thus if N number of sections are connected in cascade as shown in

V n = a N V (8)

and the Thevenin resistance will be R. The equivalent circuit is shown in

As an application of the above theory,

It may be noted that the Thevenin voltage and the node voltage are the same as long as attenuator is not loaded. Hence in a chain of cascaded attenuator only the last one will have this property; all others do change their node voltages. This aspect is further discussed in section on practical results. Note that the spread, from Equation (6), is 2.25; while this would have been 23 if a single attenuator with a = 1/24 were used.

Let us consider the circuit of

V T 1 = r − 1 r V o . (9)

Repeating the similar step across the terminals 22’ and using superposition theorem, the circuit reduces to that shown in

V T 2 = r − 1 r 2 V o + r − 1 r V 1 = r − 1 r 2 [ V o + r V 1 ] . (10)

Repeating the same across terminals 33’, the circuit reduces to that shown in

V T 3 = r − 1 r 3 V o + r − 1 r 2 V 1 + r − 1 r V 2 = ( r − 1 ) r 3 [ V o + r V 1 + r 2 V 2 ] . (11)

Proceeding in this manner, we can write for the entire circuit of

V o u t = r − 1 r N ∑ k = 0 N − 1 r k V k . (12)

Now we modify the circuit as shown in _{k}_{ }(k = 1, N − 1) are inserted which are operated by digital input. Depending upon the bit value, the particular switch connects to different weighted voltages according to the radix r. Thus the output voltage is proportional to the analog value of the digital input.

The resistance values in

A resistance of value (r − 1) is connected across terminals NN’ so as to make the ladder symmetrical. This is shown in

V ′ o u t = r r + 1 V o u t . (13)

This DAC, if connected to some circuit, will be further loaded. To avoid this loading, one can connect a non-inverting amplifier at the output as shown in _{f}. However, one resistance can be reduced, if an inverting amplifier is used, as shown in _{f}. If a positive output is required, then the polarity of all the weighted reference voltages can be changed to negative.

The circuits shown in

The calculated values of voltages V_{1}, V_{2} and V_{3} are (4.54 ≠ 6 V, 1.625 ≠ 2 V, 0.5 V, respectively, using node analysis, and the corresponding practically measured values are 4.6 V, 1.82 V and 0.5 V which are in close agreement.

Following 3 sets of measurements were made for the DAC: 1) without any resistance r(r − 1)R = 6 kΩ at the output, 2) with resistance 6 kΩ connected across NN’ and 3) with inverting amplifier of gain −3/2. Resistance values chosen as R_{1} = 4 kΩ, R_{2} = 3 kΩ, and R = 2 kΩ, R_{f} = 8 kΩ. The analog voltage output V ‴ o u t versus the digital input for set (3) are plotted in

Design relations have been derived for the simplest possible attenuator circuit when connected to a voltage source of voltage V and a series resistance R, such that the complete circuit offers the Thevenin Resistance R. Spread relations for the circuit have been derived. An example when 3 such attenuators with different attenuation constants are connected in cascade has been given. Interestingly, the two attenuators with attenuation factors 1/2 and 1/3 have the same spread of 2. A generalized attenuator has been obtained when N number of identical attenuators are connected in cascade. This has been used to derive a general digital to analog converter for any radix r. Specific circuits were assembled in the laboratory and practical results were taken. These results match closely with the expected theoretical ones.

The author acknowledges with thanks the help rendered by Dr. Nandakumar in drawing nice figures, Mr. Siddharth Kala for taking the practical results. He wishes to thank the reviewer for the constructive suggestions.

Rathore, T.S. (2018) Design of Digital to Analog Converters with Arbitrary Radix. Circuits and Systems, 9, 49-57. https://doi.org/10.4236/cs.2018.93005